With continuous advancement of space technology and expansion of human's activity, various space exploration projects have been proposed for exploitation of outer space. In the outer space, large-scale integrated circuits are often disturbed by complex electromagnetic environment and thus may not function properly. For example, devices such as RAM, which stores data in bi-stability, may be upset under strong disturbance, altering a stored ‘0’ to ‘1’, or vice versa. This phenomenon is called Single Event Upset (SEU). The SEU may cause serious consequences such as failure of control programs or errors of important data. As integration level of chips increases, possibility of such errors also increases.
Initially, it was proposed to improve anti-SEU ability of a memory by increasing capacitance and impedance of a storage node because the larger capacitance and impedance may result in a longer RC delay in the node's hopping to an upset voltage level. Typically the SEU may only generate a transient large current, which lasts a short period insufficient for the storage node to hop to the upset voltage level. However, this solution has an inherent drawback in that the longer RC delay also results in longer time for writing data. Moreover, the storage node having the larger capacitance and impedance may consume larger area, in addition to causing increased capacitance of bit lines and a longer access time.
It was also proposed to improve the anti-SEU ability of the memory by adding redundant storage nodes. For example, a storage cell may comprise a plurality of storage nodes, e.g., seven, eight, or twelve storage nodes. However, this solution also has drawbacks similar to those described above such as the long writing time, the increased capacitance of the bit lines, and the long access time.
Recently, there is an attempt to improve anti-SEU ability of the memory in a system logic level, in which erroneous data caused by the SEU is corrected by an error detection and correction (EDAC) circuit. A tri-state voting circuit has been used for logic judgment in a device for storing encoded, and/or decoded codes. However, this will consume three times of area. Moreover, the circuit becomes complex and consumes more power, which is disadvantageous for a large-scale storage circuit.